virtual IP prototyping

Virtual IP prototyping allows a designer to create a fast prototype in a "soft" form, i.e. without using physical hardware. The technology is powerful enough to model both the hardware and software portion of complex embedded and SOC designs in the very early stages of the design cycle.

The virtual prototype builds upon the following Virtio IDE components:
1. Fast processor models: or instruction-set simulators, connected to standard software debuggers, enable the loading and execution of the real software on the prototype.
2. Hardware / peripheral models: standard processor peripherals, busses, and hardware accelerators can be captured as high-level C/C++ models, and compiled and executed on top of a system simulator, to capture the hardware portion in a design.
3. Co-simulation APIs: between the processor models and hardware simulator enable a seamless communication between the hardware and software domain.

Virtual platforms span multiple levels of accuracy, ranging from functional-accurate, timed-accurate to cycle-accurate models. They combine instruction-accurate or cycle-accurate processor models and functional peripheral models, and employ appropriate bus functional models whenever needed. For example, software development typically requires only functional accurate models, with relatively little detail incorporated in the peripheral models. Exploiting this capability will render models that allow designers to boot operating-systems on top of the prototype.

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