Synopsys has been delivering tools to create virtual prototypes for years. The new Virtualizer Development Kit (VDK) is designed to make that process easier. One feature is power debugging, which allows designers to see how power utilization performs for various run modes as well as for application execution. This then allows software developers to experiment with different run/idle management strategies as well as testing applications to see how well they perform.
Apr 14, 2012

This is the first of a series of articles that will attempt to bring answers together and to provide a comprehensive view of the prototyping space on how EDA vendors categorize prototyping, who creates the models, what are they used for, roadblocks in adoption and their opinions about the future of prototyping. If you are considering inserting a prototype into your design flow, which ones are likely to provide you with the most value and what are the difficulties you can expect to face?
Nov 21, 2011

IEEE announced that the IEEE Standards Association (IEEE-SA) Standards Board has approved a revised version of the IEEE 1666™ "Standard SystemC Language Reference Manual," which specifies SystemC, the high-level design language used in the design and development of electronic systems. The new version of IEEE 1666 encompasses many enhancements, notably the support for transaction-level modeling (TLM), a critical approach to enable higher level and more efficient design of complex integrated circuits (ICs) and system-on-chips (SoCs).
Nov 10, 2011

Automotive OEMs are constantly looking for ways to speed up the development of networked cars. A critical component of these cars - the electronic control units or ECUs - need to be developed and tested quicker and more accurately than ever before. Virtual prototyping is used to develop and debug designs in the pre-silicon environment months. Automotive Industries spoke to Synopsys, and asked what challenges face ECU developers.
Oct 01, 2011

Skyrocketing software development costs, which for years have been "somebody else's problem," are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and even performing very early functional verification using abstract models.
Jun 30, 2011

Virtual prototypes offer software teams a way of creating software somewhat independently of physical hardware (silicon), which can result in a nine to 12-month market advantage. Software teams can start developing code even before the hardware team has produced any RTL. Development teams can use this productivity advantage to get to market faster or allow for more testing time, including corner testing.
Jun 28, 2011

The tools are now mature enough for even risk-averse engineering teams to embrace.
May 24, 2011

Prototyping at different stages within a design has become a mainstream methodology and more recently focuses on specifically enabling the design chain from IP providers, semiconductor providers, integrators and OEMs. It plays a key role in those interactions because early prototypes enable communication of requirements from customers to suppliers as well as early software development and verification by suppliers for their customers.
Dec 16, 2010

Building a system now includes software, but defining the software stack is a mounting challenge for engineers. What used to be almost exclusively drivers now includes RTOSes and OSes, executable files, middleware, firmware, IP, embedded software and applications.
Aug 26, 2010

Battery life has become the Achilles heel for the success of mobile software platforms, such as Android. This article outlines how Virtual Prototypes (VPs) provide all the necessary elements for a debug solution that can spot and remove power related defects from software.
Jul 20, 2010

Bringup Android on a new device cannot be done without touching the internals of the Android Software Stack. Device specific services and applications need to be integrated and tested along with the rest of Android. The vertical integration of a device feature across all those layers in the software stack is a fair challenge.
Jul 01, 2010

In the verification realm, new and emerging standards are behind the broadening acceptance of transaction-based verification methodologies. Standards like OSCI’s TLM (transaction-level modeling) 2.0 and Accellera’s Standard Co-Emulation Modeling Interface (SCE-MI) have led to a groundswell of interest in transactions. Also, flows are now using hardware acceleration and emulation to give transaction-based verification a turbo boost in speed.
Jun 22, 2010

In a variety of application domains like wireless, multimedia, networking, and automotive, it has become more and more difficult to provide silicon solutions without the associated software executing on the hardware. Not only has software become the key functional differentiator in many areas; its development cycle now determines the overall project success.
Jun 01, 2010

An introduction to how virtual prototyping takes a pair of scissors to development time and costs. Developing software for hardware prototypes that aren’t yet available has always been a complex, time-consuming task with inherent risk. The arrival of effective, easy-to-use development tools was a significant first step toward developing code faster with fewer bugs.
May 17, 2010

What will 2010 bring for verification and system-level design? The semiconductor “beasts” that need to be verified are getting more and more complex. These beasts are developed at smaller technology nodes, and with the declining number of design starts. Programmability plays a significant role, both in ASIC and ASSP designs, since users have to deal with more and more processors.
Jan 08, 2010

By combining the advantages of software and hardware-based development methods, system prototyping enables early and productive software development.
Oct 29, 2009

System-Level Design sat down with Frank Schirrmeister, director of product development in Synopsys’ solutions group; Ghislain Kaiser CEO of DOCEA Power: John Sanguinetti, CTO at Forte Design Systems; Vincent Perrier, Cofluent Design co-founder and director of products and marketing.
Oct 28, 2009

By interfacing pls’ Universal Debug Engine (UDE) with VaST’s virtual processor models, developers can use pls’ UDE with virtual prototypes for the simulation and test of automotive software applications.
Sep 15, 2009

I remember the moment I first realized that the EDA industry was on the dawn of a major transition, in my case from gates to RTL. My colleague Robert was cursing, because he was convinced this new logic synthesis tool we had just introduced “was all wrong and couldn’t deliver.”
Sep 03, 2009

With design complexity always on the rise and an increasing amount of embedded software encapsulation in designs today, engineering teams need to be concerned with power consumption in the initial architectural design. The only way to do that is to model power consumption at the transaction level.
Aug 20, 2009

System Level Design sat down to discuss issues in system-level verification with Frank Schirrmeister, director of product development in Synopsys’ solutions group; Donald Cramb, director of professional services at Eve; Patrick Sheridan, director of marketing at CoWare, and Scott Sandler, president of SpringSoft USA. This article is one part of three and contains excerpts of that conversation. You should see all three parts of the conversation.
Jul 31, 2009

Systems such as wireless handsets include an integrated System-On-Chip (SoC) often based on a multi-core architecture, with at least one Digital Signal Processor (DSP) and one Micro Controller Unit (MCU) core. Validating the application and modem software that runs on these devices is a lengthy task. Moreover, the earlier software developers can access a realistic platform of the system, the earlier they can validate their software and ship a product. Synopsys virtual platform enables pre-silicon software development, which allows software developers to develop and test software earlier, thus reducing time-to-market. A small fee may be required.
Jul 31, 2009

At least for the last decade, we have been hearing about the worlds of embedded software and hardware growing closer, but there has been very little measurable evidence to back up those claims. Some results confirmed what market researchers had predicted: the percentage of users claiming that their overall software effort was ....
Jul 29, 2009

CoWare announced the availability of a new interconnect and memory-subsystem performance optimization design flow for its Platform Architect product.
Jun 15, 2009