With the constant drive towards more integrated devices that perform a variety of functions and support multiple standards, flexibility is becoming the buzzword of today’s design teams. These teams are tasked with developing products that can deal with growing performance demands, consume as little power as possible and can process parallel functions all while meeting time-to-market pressure. While enabling performance and low power, in a lot of cases fixed hardware blocks are inadequate because of their lack of flexibility, reusability and ability to deal with multiple modes and standards. For a lot of specific tasks standard processors have challenges of their own in terms of meeting the performance and power consumption requirements.

This is where custom processors are saving the day. Their unique ability to offer flexibility through software reprogrammability while limiting overhead makes them the ultimate trade-off between flexibility and power, performance and area. Custom processors have the added benefit that they reduce the verification effort by decoupling the hardware verification and the functional verification.

Processor Designer takes creation of custom processor to the next level by providing one formal input specification for ISS, SW tools and RTL implementation model. The unique custom processor C–to–implementation flow of Processor Designer achieves great quality of results. Overall the benefits are clear - more flexibility to deal with today’s and future requirements, reduced verification effort and no compromises on power, area and performance. This not only results in faster time-to-market but ensures higher reuse between iterative designs.

Contact Synopsys and find out how you could benefit from custom processors made easy.

Highlights

• Integrated design environment for unified application specific processor, programmable accelerator design and software development tool generation
• Slashes application specific processor and programmable accelerator hardware design time by months
• Eliminates months of engineer-effort for software tool development
• Ensures compatibility of instruction set simulator (ISS), software development tools and RTL implementation
• Software development environment enables application software development prior to silicon availability

Synopsys Processor Designer is an automated, application-specific embedded processor design and optimization environment that slashes months from processor hardware design time. It also eliminates months of engineer-effort typically needed for the creation of application processor-specific software development tools. Processor Designer's high degree of automation enables design teams to focus on architecture exploration and application-specific processor development, rather than on consistency checking and verification of individual tools.

Processor Designer dramatically accelerates the design of both custom processors and programmable accelerators, including the application-specific instruction set processors (ASIPs) that are increasingly essential to convergent system-on-chip (SoC) functionality. Processor Designer is used to develop a wide range of processor architectures, including architectures with DSP-specific and RISC-specific features as well as SIMD and VLIW architectures.

Processor Designer's generated software development environment enables the commencement of application software development prior to silicon availability, thus eradicating a common bottleneck in embedded system development.

The key to Processor Designer's automation is its Language for Instruction Set Architectures, LISA 2.0. In contrast to SystemC, which has been developed for efficient specification of systems, LISA 2.0 is a processor description language that incorporates all necessary processor-specific components such as register files, pipelines, pins, memory and caches, and instructions. It enables the efficient creation of a single golden processor specification as the source for the automatic generation of the instruction set simulator (ISS) and the complete suite of software development tools, like Assembler, Linker, Archiver and C-Compiler, and synthesizable RTL code. The development tools, together with the extensive profiling capabilities of the debugger, enable rapid analysis and exploration of the application-specific processor's instruction set architecture to determine the optimal instruction set for the target application domain. Processor Designer enables the designer to optimize instruction set design, processor micro-architecture and memory sub-systems, including caches.

Processor Designer's use of a single high-level processor specification ensures the consistency of the ISS, software development tools and RTL implementation, eliminating the verification and debug effort necessitated by multiple, independently-created models.

Operating at a high level of abstraction, Processor Designer not only eliminates the time and cost inherent in HDL-based processor design and manual tool development, but also enables hardware and software designers to customize the instruction set to their needs.

Custom Processor Development CoStart
The CoStart program is intended to be a vehicle to rapidly get up to speed using Synopsys Processor Designer for custom processor development. The program contains an intense knowledge transfer, while assisting in the project planning, model development and optimization, subsystem integration, and the fine tuning of the end results such as the RTL implementation or the software tools.

Project Objectives

• Project, methodology and tool flow coaching in order to produce better results in a shorter time
• Sharing user experience and raising the knowledge and expertise for processor modeling using LISA to successfully meet design goals
• Leveraging the PD Starter Kit providing design data and documentation to quickly get up to speed with Processor Designer and LISA
• Avoiding the risk of not achieving goals by a misinterpretation of the recommended design and modeling flow
• Maximizing the value of the Synopsys value links to software development (Virtual Prototyping and FPGA-Based Prototyping), implementation (Design Compiler) and verification (VCS)