As a Synopsys customer, you realize how important it is to maintain a leading-edge design environment. You want to maximize the investment you've made in Synopsys tools because you know that the faster you adopt the latest EDA technology, the more productive your team becomes and the more differentiated your products will be.
Synopsys Professional Services is expert in Synopsys' technology-leading tools and platforms. Benefiting from our close ties to the tool developers, extensive and ongoing employee training, and a broad resume of customer project experience, our design consultants are uniquely qualified to help you rapidly deploy the latest EDA technology into your flow.
You've made the right choice. Synopsys' portfolio is the industry's leading suite of implementation and verification tools for developing complex chips. Of course, maintaining our technology leadership means that we continuously enhance our products with the most advanced features to improve designer productivity and address the latest design challenges. Synopsys consultants help you take immediate and full advantage of Synopsys tools’ capabilities and run time improvements, rapidly integrating them into your production flow and applying them in real-time to your most critical designs.
Synopsys’ Tool & Methodology Adoption services include assistance with:
- Migrating and customizing design scripts for new tool versions
- Methodology consulting to deploy design methods and best practices
- Applying new tool features through project-based design assistance
- Design Compiler Ultra: Library-aware mapping and structuring, data path optimization, critical path re-synthesis and topographical technology for accurate correlation to post-layout timing, area and power
- Design Compiler Graphical: Virtual global routing technology to predict wire routing congestion during RTL synthesis
- IC Compiler: Concurrent multi-mode, multi-corner optimization, advanced clock tree synthesis and post-route optimization, physically-aware scan-chain optimization, signal integrity (SI) and Multi-Vth leakage power optimization, multi-voltage power optimization, MTCMOS leakage optimization, yield optimization
- IC Compiler Zroute Technology: Advanced routing algorithms, concurrent DFM optimizations and multithreading
- IC Validator: In-Design physical verification
- PrimeTime Suite: HSpice-accurate analysis, CCS modeling, automated hold fixing, ILM/ETM-based hierarchical static timing analysis, advanced on-chip variation (AOCV), crosstalk delay/crosstalk noise, IR drop analysis, SI sign-off, comprehensive power analysis extension, vector-free analysis, variation-aware statistical timing
- VCS: SystemVerilog for design and verification, coverage analysis
To get more information on how we can customize our services for you, please contact us or call your local sales representative.