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Seminar Series 2010
Attend a Synopsys technical seminar near you
Webinars
View our online webinars and learn from technology experts on a variety of topics.
SNUG Conferences
Forum for Synopsys users to exchange, discuss and explore ideas
Workshop Series 2010
Hands-on learning from Synopsys experts
News
Synopsys CFO Brian Beattie to Speak at Deutsche Bank Technology Conference
Synopsys Completes Acquisition of Virage Logic Corporation
Synopsys DesignWare SATA IP Enables First-Pass Silicon Success for Global Unichip Corporation
Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology
Media Advisory/Alert: Synopsys to Host First Synposium Virtual Event
Synopsys Posts Financial Results for Third Quarter Fiscal Year 2010
Synopsys Launches DesignWare USB Software Alliance Program
Synopsys Adds TDD Support to LTE Model Library
Synopsys and Lattice Renew OEM Relationship for FPGA Synthesis Software
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Blogs
Low Power Blog: Magic Blue Smoke
A View from the Top: A System-Level Blog
Analog Insights Blog: Analog/Mixed-Signal Design and Verification
On Verification: A Software-to-Silicon Verification Blog
Standards Blog: The Standards Game
USB IP Blog: To USB or Not to USB
The Eyes Have it: An IP Blog
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Webinars
Verification For Low Power Using ESP-CV
Extraction at 28nm with StarRC
Analog IP into Digital SoC for Broadband Communication
VCS Coverage Driven Verification
Take Control of Your Design With the Lynx Design System
Multi-Gigabit Signal Integrity Analysis with HSPICE
Manufacturing-Aware Routing at 32/28nm
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Events
FPGA World
Chip in Sampa
Synposium. A Synopsys Virtual Event
SPIE Photomask Technology
Intel Developers Forum (IDF 2010)
SNUG Boston
SNUG Ottawa
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A
AMBA
AMS Co-Sim
Audio IP
C
Cadabra
CATS
Certify
CHIPit.com
Circuit Check
CoMET
CoMET/METeor Models
Confirma
coreAssembler
coreBuilder
coreConsultant
Custom Designer LE
Custom Designer SDL
Custom Designer SE
Custom WaveView
CustomExplorer
CustomSim
D
Data Converters
Datapath
DC Ultra
DDR
Design Compiler Graphical
Design Services
DesignWare
DesignWare System-Level Library
Device Controller
DFTMAX
DSP model libraries
E
Eclypse Low Power Solution
ESP-CV
Ethernet
F
Fammos TX
Formality
FPGA Design
G
Galaxy Constraint Analyzer
H
HAPS
HDMI IP
Hercules
HSIM
HSIM Plus
HSPICE
I
I2C
IC Compiler
IC Validator
IC Workbench Plus
Identify
Implementation
Innovator
Interconnect Simulation
IP
J
JPEG
L
Leda
Liberty NCX
Lynx Design System
M
Magellan
Manufacturing
Memory Models
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M
Mobile Storage
MVRC Multi-voltage Rule Checker
MVSIM
N
NanoSim
NanoTime
O
OCP
Odyssey
P
PCI Express
PCI/PCI-X
Pioneer-NTB with Vera
Platform Architect
Platform Architect Models
Power Compiler
PrimeRail
PrimeTime
PrimeYield
Process Simulation
Processor Designer
Proteus
Proteus MetroKit
PSM-Check and Create
R
Raphael
S
Saber
Saber Harness
Saber Simulator
SATA
Seismos CX
Seismos LX
Sentaurus Device
Sentaurus Lithography
Sentaurus Process
Sentaurus Topography
Serial I/O
Signoff
SPW
Star IP
StarRC
Synphony C Compiler
Synphony Model Compiler
Synplify Premier
Synplify Pro
System Studio
System-Level Libraries
T
Taurus-Medici
Taurus-TSuprem4
TCAD
TetraMAX ATPG
Touch Screen Controllers
U
USB
V
VCS
VCS Verification Library
Verification
Verification IP
Video Analog Front Ends
Virtual Prototyping
W
Wireless USB
X
XA Technology
XAUI
Y
Yield Explorer
Z
Zroute
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