Ever increasing algorithm complexity, especially in next generation wireless and multimedia systems, requires significant productivity gains in implementation and verification of these systems. Connections of algorithmic synthesis to system-level algorithm verification and optimization solutions as well as virtual platforms addresses those requirements. The Synopsys System-Level Catalyst program is an elegant initiative to allow Synopsys solutions and Synfora’s PICO platform to maintain interoperability to provide an integrated solution to our customers. - Vinod Kathail, CTO of Synfora

Product Description
Synfora’s PICO platform automatically creates complex hardware sub-systems from sequential untimed C algorithms. Tools based on the PICO platform allow designers to explore programmability, performance, power, area and clock frequency. In addition, tools developed with the PICO platform technology will reduce time to market by eliminating months of manual RTL design and by providing a comprehensive and robust verification and validation environment, which includes SystemC TLM support and automatic RTL testbench creation.

PICO platform tools support SoC and FPGA flows enabling designers to build a library of re-usable algorithmic IP that can rapidly be deployed on a wide range of silicon technologies.

Interoperability Description and Customer Benefit
Synfora’s PICO Extreme is an algorithmic synthesis tool used to design complex SoCs and FPGAs. PICO Extreme creates complex application accelerators from untimed C algorithms in the video, audio, wireless and security space. PICO Platform allows designers to achieve the best productivity, using the highest level of abstraction, with QoR that is competitive with manual design. The joint Synopsys / Synfora solutions allows the optimized automated implementation of digital signal processing algorithms developed in System Studio and implemented using Synfora’s PICO platform.

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Flow Diagram